Embodiments of the present disclosure relate to a semiconductor device and a semiconductor system including the same, and more particularly to a technology for reducing the size of a storage space of parity bits of the semiconductor device.
Due to limitation in operation speed of a semiconductor memory device such as a Dynamic Random Access Memory (DRAM), single data rate (SDR) memories acting as synchronous semiconductor memory devices have been widely used to increase operation speeds of semiconductor memory devices. Synchronous semiconductor memory devices may operate in synchronization with a rising edge of a system clock. The operation speed of the synchronous semiconductor memory devices has been increasing.
Technology of such higher-speed semiconductor memory devices continues to develop with the advent of a double data rate (DRR) memories operating in response to a rising edge and a falling edge of the system clock. Likewise, SDR and DDR memories have become a mainstream of current memory devices in consideration of a user request or characteristics of application products.
Meanwhile, each of SDR and DDR memories has a DQ mask function, where “DQ” is an input/output (I/O) channel of data, and the term “mask” indicates an operation for suppressing input/output of data.
A DQ mask (also Data Mask (DM) herein) signal obstructs progression of some data during the read or write operation, such that the data is not actually read from or written into semiconductor memory devices. For example, SDR and DDR memories generate a DM command for suppressing input data from being written into memory cells during a data write operation.
In more detail, the SDR memory synchronizes the DM signal generated from a DM buffer with a clock signal to generate a DM signal. The DDR memory synchronizes an output signal of a DM buffer with a clock signal for a data strobe (DS) signal of a memory controller. As a result, the DDR memory is synchronized with the output of the DS signal to generate a DM signal.
When performing a termination test of semiconductor memory devices on a wafer, the termination test of a data mask (DM) pad is omitted to improve efficiency of the termination test.
Memory modules associated with a computing device are generally used to process two types of data, i.e., general data and graphic data. For example, processing the graphic data may include displaying image(s) on a screen. A memory module associated with such graphic processing may include a DM module.
The DM module is designed to improve operation of DRAM(s). The data mask (DM) is desired for performing data read or write operation for DRAM(s) at a high speed during a graphic processing time.
The aforementioned high-speed read and write operations of data between the DM module and each of the DRAM(s) are performed using a DM bit signal being input/output to/from a data bus of the corresponding DRAM. For example, the DM bit signal is used to mask a data line to suppress a write operation into a DRAM associated with the DM bit signal.
As the operation frequency of a semiconductor device is increasing to make the operation speed of the semiconductor device faster, the number of data bits simultaneously input/output to/from the semiconductor device is also increasing. As a result, the number of pads arranged in the semiconductor device also continues to increase.